PIC18F010T-I/SN データシートの表示（PDF） - Microchip Technology

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PIC18F010T-I/SN

High Performance Microcontrollers

Microchip Technology 

PIC18F010/020

TSTFSZ

Test f, skip if 0

Syntax:

[ label ] TSTFSZ f [,a]

Operands:

0 ≤ f ≤ 255

a ∈ [0,1]

Operation:

skip if f = 0

Status Affected: None

Encoding:

0110 011a ffff ffff

Description:

If ’f’ = 0, the next instruction,

fetched during the current instruc-

tion execution, is discarded and a

NOP is executed making this a two-

cycle instruction. If ’a’ is 0, the

Access Bank will be selected, over-

riding the BSR value. If ’a’ is 1, the

Bank will be selected as per the

BSR value.

Words:

1

Cycles:

1(2)

Note: 3 cycles if skip and followed

by a 2-word instruction

Q Cycle Activity:

Q1

Q2

Q3

Decode

Read

register ’f’

Process

Data

If skip:

Q1

Q2

Q3

No

operation

No

operation

No

operation

If skip and followed by 2-word instruction:

Q1

Q2

Q3

No

operation

No

operation

No

operation

No

operation

No

operation

No

operation

Q4

No

operation

Q4

No

operation

Q4

No

operation

No

operation

Example:

HERE

NZERO

ZERO

TSTFSZ CNT

:

:

Before Instruction

PC

= Address (HERE)

After Instruction

If CNT

=

PC

=

If CNT

≠

PC

=

0x00,

Address (ZERO)

0x00,

Address (NZERO)

XORLW

Exclusive OR literal with WREG

Syntax:

[ label ] XORLW k

Operands:

0 ≤ k ≤ 255

Operation:

(WREG) .XOR. k → WREG

Status Affected: N,Z

Encoding:

0000 1010 kkkk kkkk

Description:

The contents of WREG are

XOR’ed with the 8-bit literal 'k'.

The result is placed in WREG.

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Q2

Decode

Read

literal ’k’

Q3

Process

Data

Q4

Write to

WREG

Example:

XORLW 0xAF

Before Instruction

WREG = 0xB5

N

=?

Z

=?

After Instruction

WREG =

N

=

Z

=

0x1A

0

0

 2001 Microchip Technology Inc.

Preliminary

DS41142A-page 137

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