STPCE1EDBC データシートの表示（PDF） - STMicroelectronics
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STPCE1EDBC Datasheet PDF : 87 Pages
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STRAP OPTION
3. STRAP OPTION
This chapter defines the STPC Elite Strap Options
and their location. Some strap options have been
left programmable for future versions of silicon..
Table 3-1. Strap Options
Signal
Designation
Actual Settings1 Set to’0’
Set to’1’
MD2
MD3
HCLK_PLL speed
User defined
User defined
see Section 3.1.4. bit 6
see Section 3.1.4. bit 7
MD4
PCI_CLKO divisor
User defined
see Section 3.1.1. bit 4
MD5
MCLK/HCLK Sync (see Section 3.1.1. )
User defined
Async
Sync
MD6
PCI_CLKO setup
User defined
see Section 3.1.1. bit 6
MD7
Reserved
Pull down
-
-
MD10
Reserved
Pull down
-
-
MD11
Reserved
Pull down
-
-
MD16
Reserved
Pull up
-
-
MD17
PCI_CLKO divisor
User defined
see Section 3.1.3. bit 1
MD18
Reserved
Pull Up
-
-
MD19
Reserved
Pull Up
-
-
MD20
Reserved
Pull Up
-
-
MD21
Reserved
Pull Up
-
-
MD22
Reserved
Pull up
-
-
MD23
Reserved
Pull up
-
-
MD24
User defined
see Section 3.1.4. bit 3
MD25
HCLK PLL speed
User defined
see Section 3.1.4. bit 4
MD26
User defined
see Section 3.1.4. bit 5
MD27
Reserved
Pull down
MD28
Reserved
Pull down
MD29
Reserved
Pull down
MD30
Reserved
Pull down
MD40
CPU clock multiplication factor
User defined
X1
X2
MD41
Reserved
Pull down
-
-
MD42
Reserved
Pull up
-
-
MD43
Reserved
Pull down
-
-
MD44
Bus select
User defined
ISA
Local Bus
MD45
Reserved
Pull down
-
-
MD46
Reserved
Pull up
-
-
MD47
Reserved
Pull down
-
-
MD48
Reserved
Pull up
-
-
TC
Reserved
Pull up
DACK_ENC[2:0]
Reserved
Pull up
Note1: Where a strap is represented by a ’Pull up’ or ’Pull down’, these have to be adhered to. If it is represented as a ’-
’ it can be left unconnected. Where ’User defined’, the strap is set by the user.
Release 1.3 - January 29, 2002
27/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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