CL-PS7500FE データシートの表示（PDF） - Cirrus Logic

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CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

19.1.5 Assembler Syntax — Form 2

<LFM|SFM>{cond}<FD,EA> Fd,<count>,[Rn]{!}

This form of the instruction is intended for stacking type operations on the floating-point registers.

Table 19-3 shows how the assembler mnemonics translate into bits in the instruction.

Table 19-3. Assembler Mnemonics

Name

Stack L Bit P Bit U Bit

Post-increment load LFMFD 1

0

1

Pre-decrement load LFMEA 1

1

0

Post-increment store SFMEA 0

0

1

Pre-decrement store SFMFD 0

1

0

FD and EA define pre/post indexing and the up/down bit by reference to the form of stack required. The

F and E refer to a full or empty stack (that is, if a pre-index has to be done (full) before storing to the stack).

The A and D refer to whether the stack is ascending or descending. If ascending, an SFM goes up and

LFM down; if descending, vice-versa.

NOTE: Only EA and FD are permitted: the LFM/SFM instructions are not capable of supporting empty descending

or full ascending stacks.

{!}

Write back the base register (set the Wb bit) if ! is present.

If Rn is R15, writeback should not be speciÞed.

19.2 Coprocessor Data Operations

31

28 27

24 23 22 21 20 19

16 15

12 11

87

43

0

cond

1110

abcd

e Fn

Xj Fd

0001

j Fd

i Fm

where:

abcd

j

ef

gh

i

opcode

dyadic/monadic:

0

dyadic

1

monadic

destination size

rounding mode

constant /Fm

19.2.1 Dyadic Operations

<ADF|SUF|RSF|MUF|OVF|RDF|>{cond}<S|D|E>{P|M|Z} Fd, Fn, <Fm|#value>

<FML|FDV|FRD|RMF>

174

FLOATING-POINT INSTRUCTION SET

ADVANCE DATA BOOK v2.0

June 1997

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