STM32F103V8H6TR データシートの表示（PDF） - STMicroelectronics

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STM32F103V8H6TR

Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 com. interfaces

STMicroelectronics 

Electrical characteristics

STM32F103xC, STM32F103xD, STM32F103xE

Table 62. DAC characteristics (continued)

Symbol

Parameter

Min Typ

Max

Offset error

±10

(difference between

Offset(2) measured value at Code

±3

(0x800) and the ideal value =

VREF+/2)

±12

Gain

error(2)

Gain error

±0.5

Settling time (full scale: for a

10-bit input code transition

tSETTLING(2)

between the lowest and the

highest input codes when

DAC_OUT reaches final

value ±1LSB

3

4

Max frequency for a correct

Update

rate(2)

DAC_OUT change when

small variation in the input

1

code (from code i to i+1LSB)

Wakeup time from off state

tWAKEUP(2) (Setting the ENx bit in the

DAC Control register)

6.5 10

Power supply rejection ratio

PSRR+ (1) (to VDDA) (static DC

measurement

–67 –40

1. Guaranteed by design, not tested in production.

2. Guaranteed by characterization, not tested in production.

Unit

Comments

mV

Given for the DAC in 12-bit

configuration

LSB

Given for the DAC in 10-bit at VREF+

= 3.6 V

LSB

Given for the DAC in 12-bit at VREF+

= 3.6 V

%

Given for the DAC in 12bit

configuration

µs CLOAD  50 pF, RLOAD  5 k

MS/s CLOAD  50 pF, RLOAD  5 k

CLOAD  50 pF, RLOAD  5 k

µs input code between lowest and

highest possible ones.

dB No RLOAD, CLOAD = 50 pF

Figure 57. 12-bit buffered /non-buffered DAC

Buffered/Non-buffered DAC

Buffer(1)

12-bit

digital to

analog

converter

DACx_OUT

R LOAD

C LOAD

ai17157

1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly

without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the

DAC_CR register.

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Doc ID 14611 Rev 7

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