FDC37B78X データシートの表示（PDF） - SMSC -> Microchip

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FDC37B78X

Enhanced Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR

SMSC -> Microchip 

BIT

NAME

DESCRIPTION

3

PWRBTNOR_STS This bit is set when the power switch over-ride function is set: If

PWRBTNOR_EN is set, and if the Button_In signal is held

asserted for more than four seconds. Hardware is also required to

reset the PWRBTN_STS when issuing a power switch over-ride

function. (Note 1)

4-6

Reserved

Reserved. These bits always return a value of zero.

7

WAK_STS

This bit is set when the system is in the sleeping state and an

enabled wakeup event occurs. This bit is set on the high-to-low

transition of nPowerOn, if the WAK_CTRL bit in the sleep / wake

configuration register (0xF0 in Logical Device A) is cleared. If the

WAK_CTRL bit is set, then any enabled wakeup event will also set

the WAK_STS bit in addition to the high-to-low transition of

nPowerOn. It is cleared by writing a 1 to its bit location when

nPowerOn is active (low). Upon setting this bit, the system will

transition to the working state. (Note 1)

Note 1: This bit is set by hardware and can only be cleared by software writing a one to this bit

position and by Vbat POR. Writing a 0 has no effect.

Note 2: In the present implementation of Button_In, pressing the button will always wake the machine

(i.e., activate nPowerOn).

Power Management 1 Enable Register 1 (PM1_EN 1)

Register Location: <PM1_BLK>+2 System I/O Space

Default Value: 00h on Vbat POR

Attribute: Read/Write (Note 0)

Size: 8-bits

BIT

NAME

0-7 Reserved

DESCRIPTION

Reserved. These bits always return a value of zero.

Power Management 1 Enable Register 2 (PM1_EN 2)

Register Location: <PM1_BLK>+3 System I/O Space

Default Value: 00h on Vbat POR

Attribute: Read/Write (Note 0)

Size: 8-bits

BIT

0

1

2

3-7

NAME

PWRBTN_E

N

Reserved

RTC_EN

Reserved

DESCRIPTION

This bit is used to enable the assertion of the Button_In to generate an

SCI event. The PWRBTN_STS bit is set anytime the Button_In signal is

asserted. The enable bit does not have to be set to enable the setting of

the PWRBTN_STS bit by the assertion of the Button_In signal.

Reserved.

This bit is used to enable the setting of the RTC_STS bit to generate an

SCI. The RTC_STS bit is set anytime the RTC generates an alarm.

Reserved. These bits always return a value of zero.

158

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