Table 13 – Bus Control Register
BIT
BIT NAME
SYMBOL
DESCRIPTION
4 Terminal Count
Bit 8
Refresh
Synchronous
Gate Time
TC8/
RSYN/
GTTM
The function of this bit is mode dependent. TC8 is for Non-
burst or burst mode. RSYN and GTTM are for the two
Programmable-Burst modes. RSYN is for External Re-
Trigger mode. GTTM is for internal Re-Trigger mode.
Non-burst or burst mode:
TC8: Bit 8 (MSB) of 9 bit Terminal Count setting register.
The other 8 bits are in the DMA Count register. Terminal
Count setting register is ignored when ITCEN = 0.
Programmable-Burst and External Re-Trigger mode:
RSYN = 0: DMA is started Immediately.
RSYN = 1: DMA is started after Refresh execution.
Programmable-Burst and Internal Re-Trigger mode:
GTTM = 0: Gate Time is 350nS (min)
GTTM = 1: Gate Time is 750nS (min)
3,2 DMA Transfer Mode DMAMD1, These bits select the data transfer mode of the DMA. These
DMAMD0 transfer modes influence the timing of asserting/negating the
DREQ pin.
DMAMD1 DMAMD0 Transfer Mode
0
0
Non-Burst (Default)
0
1
Burst
1
0
Programmable-Burst by Timer
1 TC Polarity
TCPOL
1
1
Programmable-Burst by Cycle
Counter
This bit sets the Active polarity of TC pin.
TCPOL = 0: Active High (Default), TCPOL = 1 Active Low
0 DREQ Polarity
DRQPOL
This bit sets the Active polarity of DREQ pin.
DRQPOL = 0: Active High (Default), DRQPOL = 1 Active
Low
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