Z86M1720ASC データシートの表示（PDF） - Zilog

部品番号

コンポーネント説明

メーカー

Z86M1720ASC

PCMCIA Interface Solution

Zilog 

Z86017/Z16017 PCMCIA Interface Solution

Product Specification

39

EEPROM Register

Address: SELECT 01h

Name: Interrupt Enable Register

Type: Read/Write

Table 13. Interrupt Enable Register: Address 01h

Bit Placement Bit Name

Bit 0

EN_PC_INT0

Bit 1

EN_PC_INT1

Bit 2

EN_PC_INT2

Bit 3

EN_PC_INT3

Bit 4

EN_PC_INT4

Bit 5

EN_EXTP_WP

Description

Enables Local Processor interrupt when PCMCIA host has

written CCR0, the Con•guration Option Register. This

interrupt stays present until this bit is set to 0. This bit is

active when set to 1. On Power-On Reset, this bit is set to

0. Also see Registers 06h, 2Ch.

Enables Local Processor interrupt when PCMCIA host has

written CCR1, the Card Status Register. This interrupt

stays present until this bit is set to 0. This bit is active when

set to 1. On Power-On Reset, this bit is set to 0. Also see

Registers 06h, 2Ch.

Enables Local Processor interrupt when PCMCIA host has

written CCR2, the Pin Replacement Register. This

interrupt stays present until this bit is set to 0. This bit is

active when set to 1. On Power-On Reset, this bit is set to

0. Also see Registers 06h, 2Ch.

Enables Local Processor interrupt when PCMCIA host has

written CCR3, the Socket and Copy Register. This

interrupt stays present until this bit is set to 0. This bit is

active when set to 1. On Power-On Reset, this bit is set to

0. Also see Registers 06h, 2Ch.

Enables Local Processor interrupt when ATA_IREQ is

asserted. This interrupt stays present until this bit is set to

0. This bit is active when set to 1. On Power-On Reset, this

bit is set to 0. Also see Registers 06h, 2Ch.

Enables external write protect pin as an input when set to

1. When set to 0, this bit is DASP on the local AT bus side.

On Power-On Reset, this bit is set to 0.

Programming Internal Registers

PS012002-1201

Share Link: