STM32F207VE データシートの表示（PDF） - STMicroelectronics

部品番号

コンポーネント説明

メーカー

STM32F207VE

ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

STMicroelectronics 

Electrical characteristics

STM32F20xxx

5.3.21 DAC electrical characteristics

Table 66. DAC characteristics

Symbol

Parameter

Min Typ

Max

Unit

Comments

VDDA

VREF+

VSSA

RLOAD(2)

Analog supply voltage

1.8(1)

Reference supply voltage

1.8(1)

Ground

0

Resistive load with buffer ON 5

RO(2)

Impedance output with buffer

OFF

-

CLOAD(2) Capacitive load

-

DAC_OUT Lower DAC_OUT voltage

min(2)

with buffer ON

0.2

DAC_OUT Higher DAC_OUT voltage

max(2)

with buffer ON

-

DAC_OUT Lower DAC_OUT voltage

min(2)

with buffer OFF

-

DAC_OUT Higher DAC_OUT voltage

max(2)

with buffer OFF

-

-

IVREF+(4)

DAC DC VREF current

consumption in quiescent

mode (Standby mode)

-

-

DAC DC VDDA current

IDDA(4)

consumption in quiescent

mode(3)

-

-

3.6

V

-

3.6

V VREF+ ≤ VDDA

-

0

V

-

-

kΩ

When the buffer is OFF, the

-

15

kΩ

Minimum resistive load between

DAC_OUT and VSS to have a 1%

accuracy is 1.5 MΩ

Maximum capacitive load at

-

50

pF DAC_OUT pin (when the buffer is

ON).

It gives the maximum output

-

-

V excursion of the DAC.

It corresponds to 12-bit input code

(0x0E0) to (0xF1C) at VREF+ =

-

VDDA – 0.2

V 3.6 V and (0x1C7) to (0xE38) at

VREF+ = 1.8 V

0.5

-

mV

It gives the maximum output

excursion of the DAC.

- VREF+ – 1LSB V

With no load, worst code (0x800)

170

240

at VREF+ = 3.6 V in terms of DC

consumption on the inputs

µA

With no load, worst code (0xF1C)

50

75

at VREF+ = 3.6 V in terms of DC

consumption on the inputs

280

380

µA

With no load, middle code (0x800)

on the inputs

With no load, worst code (0xF1C)

475

625

µA at VREF+ = 3.6 V in terms of DC

consumption on the inputs

DNL(4)

Differential non linearity

Difference between two

consecutive code-1LSB)

-

-

-

-

±0.5

LSB

Given for the DAC in 10-bit

configuration.

±2

LSB

Given for the DAC in 12-bit

configuration.

120/177

Doc ID 15818 Rev 9

Share Link: