STM32F205VE データシートの表示（PDF） - STMicroelectronics

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STM32F205VE

ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

STMicroelectronics 

STM32F20xxx

Electrical characteristics

Table 32. Main PLL characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max Unit

tLOCK

Jitter(3)

IDD(PLL)(4)

IDDA(PLL)(4)

PLL lock time

VCO freq = 192 MHz

75

VCO freq = 432 MHz

100

RMS -

Cycle-to-cycle jitter

System clock

120 MHz

peak

to

-

peak

RMS -

Period Jitter

peak

to

-

peak

Main clock output (MCO) for

RMII Ethernet

Cycle to cycle at 50 MHz

on 1000 samples

-

Main clock output (MCO) for MII Cycle to cycle at 25 MHz

Ethernet

on 1000 samples

-

Bit Time CAN jitter

Cycle to cycle at 1 MHz

on 1000 samples

-

VCO freq = 192 MHz

0.15

PLL power consumption on VDD

VCO freq = 432 MHz

0.45

PLL power consumption on

VDDA

VCO freq = 192 MHz

0.30

VCO freq = 432 MHz

0.55

-

-

25

±150

15

±200

32

40

330

-

-

200

µs

300

-

-

-

-

ps

-

-

-

0.40

mA

0.75

0.40

mA

0.85

1. Take care of using the appropriate division factor M to obtain the specified PLL input clock values. The M

factor is shared between PLL and PLLI2S.

2. Guaranteed by design, not tested in production.

3. The use of 2 PLLs in parallel could degraded the Jitter up to +30%.

4. Based on characterization, not tested in production.

Table 33. PLLI2S (audio PLL) characteristics

Symbol

Parameter

Conditions

fPLLI2S_IN

fPLLI2S_OUT

fVCO_OUT

PLLI2S input clock(1)

PLLI2S multiplier output clock

PLLI2S VCO output

tLOCK

PLLI2S lock time

VCO freq = 192 MHz

VCO freq = 432 MHz

Min Typ

0.95(2)

1

-

-

192

-

75

-

100

-

Max

2.10(2)

216

432

200

300

Unit

MHz

MHz

MHz

µs

Doc ID 15818 Rev 9

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