STM32F407OGH6 データシートの表示（PDF） - STMicroelectronics

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STM32F407OGH6

ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

STMicroelectronics 

STM32F405xx, STM32F407xx

Application block diagrams

Figure 92. RMII with a 25 MHz crystal and PHY with PLL

MCU

HCLK(1)

STM32F

Ethernet

MAC 10/100

IEEE1588 PTP

Timer

input

TIM2

trigger

Timestamp

comparator

RMII_TX_EN

RMII_TXD[1:0]

RMII_RXD[1:0]

RMII_CRX_DV

RMII_REF_CLK

MDIO

MDC

Ethernet

PHY 10/100

RMII

= 7 pins

REF_CLK

RMII + MDC

= 9 pins

XTAL

25 MHz

/2 or /20

2.5 or 25 MHz synchronous 50 MHz

OSC

PLL

HCLK

MCO1/MCO2

PLL

PHY_CLK 25 MHz XT1

MS19970V1

1. fHCLK must be greater than 25 MHz.

2. The 25 MHz (PHY_CLK) must be derived directly from the HSE oscillator, before the PLL block.

DocID022152 Rev 4

175/185

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