AT89C51RC2-3CSCM データシートの表示（PDF） - Atmel Corporation
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AT89C51RC2-3CSCM Datasheet PDF : 127 Pages
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Table 49. IPH1 Register
IPH1 - Interrupt Priority High Register (B3h)
7
6
5
4
3
2
1
-
-
-
-
-
SPIH
-
Bit
Number
7
6
5
4
3
2
1
0
Bit
Mnemonic Description
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
SPIH
SPI Interrupt Priority High Bit
SPIHSPIL Priority Level
0
0 Lowest
0
1
1
0
1
1 Highest
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
KBDH
Keyboard Interrupt Priority High Bit
KB DHKBDL Priority Level
0
0 Lowest
0
1
1
0
1
1 Highest
Reset Value = XXXX X000b
Not bit addressable
0
KBDH
62 AT89C51RB2/RC2
4180E–8051–10/06
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