C8051F38B-GMR データシートの表示（PDF） - Silicon Laboratories

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C8051F38B-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

Table 14.1. AC Parameters for External Memory Interface

Parameter

Description

Min*

TACS

TACW

TACH

TALEH

TALEL

TWDS

TWDH

TRDS

TRDH

Address/Control Setup Time

Address/Control Pulse Width

Address/Control Hold Time

Address Latch Enable High Time

Address Latch Enable Low Time

Write Data Setup Time

Write Data Hold Time

Read Data Setup Time

Read Data Hold Time

0

1 x TSYSCLK

0

1 x TSYSCLK

1 x TSYSCLK

1 x TSYSCLK

0

20

0

Note: TSYSCLK is equal to one period of the device system clock (SYSCLK).

Max*

3 x TSYSCLK

16 x TSYSCLK

3 x TSYSCLK

4 x TSYSCLK

4 x TSYSCLK

19 x TSYSCLK

3 x TSYSCLK

Units

ns

ns

ns

ns

ns

ns

ns

ns

ns

110

Rev. 1.4

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