CS4239 データシートの表示（PDF） - Cirrus Logic

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CS4239

CrystalClear™ Portable ISA Audio System

Cirrus Logic 

CS4239

CrystalClearTM Portable ISA Audio System

CS9236 Wavetable Serial Port Interface

A digital interface to the CS9236 Single-Chip Wavetable Music Synthesizer is provided that

allows the CS9236 PCM audio data to be summed on the CS4239 without the need for an

external DAC. This serial port is enabled via the WTEN bit which is located in the Global

Configuration byte in the E2PROM Hardware Configuration data, or C8. The CS9236

Wavetable serial port pins are shared with the CS4610 DSP serial interface. If the CS4610 serial

interface is enabled, the CS9236 interface is not available (SPE takes precedence over WTEN).

SDATA - Wavetable Serial Audio Data, Input

This input supplies the serial audio PCM data to be mixed on the CS4239. The data consists of

left and right channel 16-bit data delineated by LRCLK. This pin should be connected to the

SOUT output pin on the CS9236. This pin should also have a weak pull-down resistor of

approx. 100 kΩ to minimize power-down currents and allow for stuffing options.

LRCLK - Wavetable Serial Left/Right Clock, Input

This input supplies the serial data alignment signal that delineates left from right data. This pin

should be connected to the LRCLK output pin on the CS9236. This pin should also have a

weak pull-down resistor of approx. 100 kΩ to minimize power-down currents and allow for

stuffing options.

MCLK - Wavetable Master Clock, Output (CDROM Enable)

This output supplies the 16.9344 MHz master clock that controls all the timing on the CS9236.

This pin should be connected to the MCLK5I input pin on the CS9236. MCLK can be disabled

in software using the DMCLK bit in C8 in the Control logical device space. DMCLK provides

a partial software power-down mode for the CS9236. At power-up, this pin is an input (with an

internal 100 kΩ pullup) that, when pulled low with a 10 kΩ resistor to SGND, enables the

CDROM interface (in lieu of the upper four ISA address pins). Loading must be limited to

CMOS inputs if this pin has the 10 kΩ resistor attached.

ZVPORT Serial Port Interface

ZSDATA - ZV Port Serial Data, Input

When the ZV port is enabled, ZVEN = 1 in X18, this pin is the serial data input.

ZLRCLK - ZV Port Left/Right Clock, Input

When the ZV port is enabled, ZVEN = 1 in X18, this pin is the Left/Right channel delineation

clock input.

ZSCLK - ZV Port Serial Clock, Input

When the ZV port is enabled, ZVEN = 1 in X18, this pin is the serial data bit clock input.

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DS253PP2

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