CS4392 データシートの表示（PDF） - Cirrus Logic

部品番号

コンポーネント説明

メーカー

CS4392

24-Bit, 192 kHz Stereo DAC with Volume Control

Cirrus Logic 

CS4392

SWITCHING CHARACTERISTICS - CONTROL PORT INTERFACE

(Inputs: logic 0 = AGND, logic 1 = VL)

Parameter

Symbol

Min

Max

Unit

I2C Mode

SCL Clock Frequency

fscl

-

100

kHz

RST Rising Edge to Start

tirs

500

-

ns

Bus Free Time Between Transmissions

tbuf

4.7

-

µs

Start Condition Hold Time (prior to first clock pulse)

thdst

4.0

-

µs

Clock Low time

tlow

4.7

-

µs

Clock High Time

thigh

4.0

-

µs

Setup Time for Repeated Start Condition

tsust

4.7

-

µs

SDA Hold Time from SCL Falling

(Note 6)

thdd

0

-

µs

SDA Setup time to SCL Rising

tsud

250

-

ns

Rise Time of Both SDA and SCL Lines

tr

-

1

µs

Fall Time of Both SDA and SCL Lines

tf

-

300

ns

Setup Time for Stop Condition

tsusp

4.7

-

µs

Notes: 6. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.

RST

t irs

Stop

S ta rt

SDA

t buf

t hdst

t high

SCL

t lo w t hdd

R e p e a te d

S ta rt

t hdst

tf

t sud

t sust

tr

Figure 38. I2C Mode Control Port Timing

Stop

t susp

34

DS459PP3

Share Link: