CS61577-IL1 データシートの表示（PDF） - Cirrus Logic

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CS61577-IL1

T1/E1 Line Interface

Cirrus Logic 

CS61577

APPLICATIONS

+ 68 µF

+5V

0.1 µF

+

1.0 µF +5V

Control

&

Monitor

Frame

Format

Encoder/

Decoder

XTL

RGND

28 CLKE

1 ACLKI

12 LOS

11 DPM

RV+

5

7

6

8

MODE

RPOS

RNEG

RCLK

3 TPOS

4 TNEG

2 TCLK

9 XTALIN

10 XTALOUT

21

RV+

15

TGND

TV+ SCLK 27

CS 26

INT 23

SDI 24

SDO 25

CS61577

IN

HOST

MODE

RTIP 19

RRING 20

MTIP 17

MRING 18

TRING 16

RGND TGND TTIP 13

22

14

100 kΩ

µP

Serial

Port

1

R1

3

R2

5

2

RECEIVE

6 LINE

2CT:1

PE-65351

0.47 µF

2

1

6

5

1:2CT

PE-65351

TRANSMIT

LINE

Frequency

MHz

1.544 (T1)

2.048 (E1)

Figure A1. T1 Host Mode Configuration

Crystal

XTL

CXT6176

CXT8192

Cable

Ω

100

120

75

LEN2/1/0

0/1/1 - 1/1/1

0/0/0

0/0/0

0/0/1

R3

Ω

not used

not used

4.4

not used

R1 and R2

Ω

200

240

150

Table A1. External Component Values

Line Interface

Figures A1-A3 show typical T1 and E1 line inter-

face application circuits. Table A1 shows the

external components which are specific to each

application. Figure A1 illustrates a T1 interface in

the Host Mode. Figure A2 illustrates a 120 Ω E1

interface in the Hardware Mode. Figure A3 illus-

trates a 75 Ω E1 interface in the Extended

Hardware Mode.

The 1:2 receiver transformer has a grounded cen-

ter tap on the IC side. Resistors R1 and R2

between the RTIP and RRING pins to ground

provide the termination for the receive line. The

transmitter also uses a 1:2 transformer. A 0.47 µF

capacitor is required in series with the transmit

transformer primary. This capacitor is needed to

prevent any output stage imbalance from resulting

in a DC current through the transformer primary.

This current might saturate the transformer pro-

ducing an output offset level shift.

26

DS155PP2

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