CS8952(2001) データシートの表示（PDF） - Cirrus Logic
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CS8952 Datasheet PDF : 82 Pages
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CS8952
6.7 Auto-Negotiation Expansion Register - Address 06h
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
Parallel
Detection Fault
Link Partner
Next Page
Able
Next Page
Able
Page
Received
Link Partner
Auto-Neg Able
BIT
15:5
4
NAME
Reserved
Parallel Detection
Fault
TYPE
RESET
Read Only 000 0000 0000
Read Only 0
3
Link Partner Next Read Only 0
Page Able
2
Next Page Able Read Only 1
DESCRIPTION
When set, this bit indicates an error condition in
which both the 10BASE-T and 100BASE-TX links
came up valid, or that one of the technologies estab-
lished a link but was unable to maintain the link. This
bit is self-clearing.
When set, this bit indicates that the link partner is
capable of Next Page exchange.
This bit is a status bit which indicates to the Manage-
ment Layer that the CS8952 supports Next Page
capability.
1
Page Received
Read Only 0
0
Link Partner Auto- Read Only 0
Neg Able
Note: This bit is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
When set, this bit indicates that a valid word of auto-
negotiation data has been received and its integrity
verified. The first page of data will consist of the Base
Page, and all successive pages will consist of Next
Page data. This bit is self-clearing.
When set, this bit indicates that the link partner has
auto-negotiation capability.
40
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
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