ST92F124JDV2TC データシートの表示（PDF） - STMicroelectronics

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ST92F124JDV2TC

8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E³ ™ (EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

STMicroelectronics 

J1850 Byte Level Protocol Decoder (JBLPD)

J1850 BYTE LEVEL PROTOCOL DECODER (Cont’d)

Figure 130. JBLPD Byte Level Protocol Decoder Block Diagram

RXDATA

VPW

DECODER

DIGITAL

FILTER

VPWI pin

STATUS

ERROR

CONTROL

I.D. Filter

FREG[0:31]

OPTIONS

TXOP

JBLPD

STATE

MACHINE

ARBITRATION

CHECKER

CRC

GENERATOR

LOOPBACK

LOGIC

CLKSEL

CLOCK

PRESCALER

Prescaled Clock

(Encoder/Decoder

Clock)

CRC BYTE

CRC\ BYTE

PADDR

TXDATA

MUX

VPW

ENCODER VPWO pin

Interrupt & DMA Logic and Registers

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