ST92F124JDV2TC データシートの表示（PDF） - STMicroelectronics

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ST92F124JDV2TC

8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E³ ™ (EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

STMicroelectronics 

ST92F124/F150/F250 - KNOWN LIMITATIONS

KNOWN LIMITATIONS (Cont’d)

By:

spp(WU_PG);

WU_CTLR = WUm_wuit | WUm_id1s | WUm_stop;

WU_CTLR = WUm_wuit | WUm_id1s;

WU_CTLR = WUm_wuit | WUm_id1s | WUm_stop;

asm(“nop”);

Dummy_16bit_data = 0;

Compiled code (with –O2 optimization option) and hexa is:

C language

Assembly

Hexa

Comment

WU_CTLR = WUm_wuit |

WUm_id1s | WUm_stop;

ld @WU_CTLR, #7 F5 F9 07

WU_CTLR = WUm_wuit |

WUm_id1s;

ld @WU_CTLR, #3 F5 F9 03

WU_CTLR = WUm_wuit |

WUm_id1s | WUm_stop;

ld @WU_CTLR, #7 F5 F9 07

The CORE executes the

following NOP and

prefetch the 2 following

bytes (BF and 00)

NOP

nop

FF

Dummy_16bit_data = 0; ldw RR0,#0

BF 00 00 00

The two first bytes fetch

in flash after wake up are

00 00

RR0 is always filled with

00 RR0 is not used in the

software

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