M25PE80-VMN6TP データシートの表示（PDF） - STMicroelectronics

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M25PE80-VMN6TP

8 Mbit, low-voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout

STMicroelectronics 

DC and AC parameters

M25PE80

Table 23. Reset conditions

Test conditions specified in Table 17 and Table 18

Symbol Alt.

Parameter

Conditions

Min. Typ. Max. Unit

tRLRH(1) tRST Reset Pulse Width

10

µs

tSHRH

Chip Select High to

Reset High

Chip should have been

deselected before Reset is

de-asserted

10

ns

1. Value guaranteed by characterization, not 100% tested in production.

Table 24. Timings after a Reset Low pulse(1)(2)

Test conditions specified in Table 17 and Table 18

Symbol Alt.

Parameter

Conditions:

Reset pulse occurred

While decoding an instruction(3): WREN,

WRDI, RDID, RDSR, READ, RDLR,

Fast_Read, WRLR, PW, PP, PE, SE, BE,

SSE, DP, RDP

Max.

30

Reset

Under completion of an Erase or Program

cycle of a PW, PP, PE, SE, BE operation

300

tRHSL tREC Recovery

Time

Under completion of an Erase cycle of an

SSE operation

3

Under completion of a WRSR operation

tW (see

Table 22)

Device deselected (S High) and in Standby

mode

0

1. All the values are guaranteed by characterization, and not 100% tested in production.

2. See Table 15 for a description of the device status after a Reset Low pulse.

3. S remains Low while Reset is Low.

Figure 29. Reset ac waveforms

Unit

µs

µs

ms

ms

µs

S

Reset

tSHRH

tRLRH

tRHSL

AI06808

54/61

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