M50FLW040AN5T データシートの表示（PDF） - STMicroelectronics
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M50FLW040AN5T
STMicroelectronics
M50FLW040AN5T Datasheet PDF : 52 Pages
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M50FLW040A, M50FLW040B
Table 13. Commands
Bus Operations(1)
Command
1st
2nd
3rd
4th
5th
Addr Data Addr Data Addr Data Addr Data Addr Data
Read Memory
Array(2,10,11)
1+ X
FFh
Read Read (Read (Read (Read (Read (Read (Read
Addr Data Addr2) Data2) Addr3) Data3) Addr4) Data4)
Read Status
Register(3,10)
1+ X
70h
X
Status
Reg
(X)
(Status
Reg)
(X)
(Status
Reg)
(X)
(Status
Reg)
Read Electronic
Signature(10)
1+
X
90h or Sig Signat (Sig (Signat (Sig (Signat (Sig (Signat
98h Addr ure Addr) ure) Addr) ure) Addr) ure)
Program / Multiple
Byte program
2
(FWH)(4,9,11)
X
40h or Prog Prog
10h Addr Data
Quadruple Byte
Program
(A/A Mux)(4,12)
5
X
30h
A1
Prog
Data1
A2
Prog
Data2
A3
Prog
Data3
A4
Prog
Data4
Chip Erase(4)
2
X
80h
X
10h
Block Erase(4)
2
X
20h
BA
D0h
Sector Erase(4)
2
X
32h
SA
D0h
Clear Status
Register(5)
1
X
50h
Program/Erase
suspend(6)
1
X
B0h
Program/Erase
resume(7)
1
X
D0h
1
X
00h
1
X
01h
Invalid reserved(8) 1
X
60h
1
X
2Fh
1
X
C0h
Note: 1. For all commands: the first cycle is a Write. For the first three commands (Read Memory, Read Status Register, Read Electronic
Signature), the second and next cycles are READ. For the remaining commands, the second and next cycles are WRITE.
BA = Any address in the Block, SA = Any address in the Sector. X = Don’t Care, except that A22=1 (for FWH or LPC mode), and
A21, A20 and A19 are set according to the rules shown in Table 5. (for LPC mode)
2. After a Read Memory Array command, read the memory as normal until another command is issued.
3. After a Read Status Register command, read the Status Register as normal until another command is issued.
4. After the erase and program commands read the Status Register until the command completes and another command is issued.
5. After the Clear Status Register command bits SR1, SR3, SR4 and SR5 in the Status Register are reset to ‘0’.
6. While an operation is being Program/Erase Suspended, the Read Memory Array, Read Status Register, Program (during Erase
Suspend) and Program/Erase Resume commands can be issued.
7. The Program/Erase Resume command causes the Program/Erase suspended operation to resume. Read the Status Register until
the Program/Erase Controller completes and the memory returns to Read Mode.
8. Do not use Invalid or Reserved commands.
9. Multiple Byte Program PA= start address, A0 (Double Byte Program) A0 and A1 (Quadruple Byte Program) are Don`t Care. PD is
two or four Bytes depending on Msize code.
10. “1+” indicates that there is one write cycle, followed by any number of read cycles.
11. Configuration registers are accessed directly without using any specific command code. A single Bus Write or Bus Read Operation
is all that is needed.
12. Addresses A1, A2, A3 and A4 must be consecutive addresses, differing only in address bits A0 and A1.
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