PIC16C6X
Applicable Devices 61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
FIGURE 18-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
RESET
Watchdog
Timer
RESET
33
32
I/O Pins
Note: Refer to Figure 18-1 for load conditions.
30
34
31
34
TABLE 18-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER REQUIREMENTS
Parameter
No.
Sym Characteristic
Min
Typ†
Max Units
Conditions
30*
TmcL MCLR Pulse Width (low)
100
—
—
ns VDD = 5V, -40˚C to +85˚C
31*
Twdt Watchdog Timer Time-out Period
7
18
33 ms VDD = 5V, -40˚C to +85˚C
(No Prescaler)
32
Tost Oscillation Start-up Timer Period
— 1024TOSC —
— TOSC = OSC1 period
33*
Tpwrt Power-up Timer Period
28
72
132 ms VDD = 5V, -40˚C to +85˚C
34*
TIOZ I/O Hi-impedance from MCLR Low —
—
100 ns
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
© 1997 Microchip Technology Inc.
DS30234D-page 191