PIC12F1822T-I/SL データシートの表示（PDF） - Microchip Technology

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PIC12F1822T-I/SL

8/14-Pin Flash Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC12F/LF1822/16F/LF1823

9.1.1 WAKE-UP USING INTERRUPTS

When global interrupts are disabled (GIE cleared) and

any interrupt source has both its interrupt enable bit

and interrupt flag bit set, one of the following will occur:

• If the interrupt occurs before the execution of a

SLEEP instruction

- SLEEP instruction will execute as a NOP.

- WDT and WDT prescaler will not be cleared

- TO bit of the STATUS register will not be set

- PD bit of the STATUS register will not be

cleared.

• If the interrupt occurs during or after the execu-

tion of a SLEEP instruction

- SLEEP instruction will be completely exe-

cuted

- Device will immediately wake-up from Sleep

- WDT and WDT prescaler will be cleared

- TO bit of the STATUS register will be set

- PD bit of the STATUS register will be cleared.

Even if the flag bits were checked before executing a

SLEEP instruction, it may be possible for flag bits to

become set before the SLEEP instruction completes. To

determine whether a SLEEP instruction executed, test

the PD bit. If the PD bit is set, the SLEEP instruction

was executed as a NOP.

FIGURE 9-1:

WAKE-UP FROM SLEEP THROUGH INTERRUPT

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1

OSC1(1)

CLKOUT(2)

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

TOST(3)

Interrupt flag

GIE bit

(INTCON reg.)

Instruction Flow

PC

PC

Instruction

Fetched

Inst(PC) = Sleep

Instruction

Executed

Inst(PC - 1)

Processor in

Sleep

PC + 1

Inst(PC + 1)

Sleep

PC + 2

Interrupt Latency(4)

PC + 2

Inst(PC + 2)

Inst(PC + 1)

PC + 2

Dummy Cycle

0004h

Inst(0004h)

Dummy Cycle

0005h

Inst(0005h)

Inst(0004h)

Note 1:

2:

3:

4:

XT, HS or LP Oscillator mode assumed.

CLKOUT is not available in XT, HS, or LP Oscillator modes, but shown here for timing reference.

TOST = 1024 TOSC (drawing not to scale). This delay applies only to XT, HS or LP Oscillator modes.

GIE = 1 assumed. In this case after wake-up, the processor calls the ISR at 0004h. If GIE = 0, execution will continue in-line.

DS41413A-page 96

Preliminary

 2010 Microchip Technology Inc.

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