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PIC16F720-EML データシートの表示(PDF) - Microchip Technology

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PIC16F720-EML
Microchip
Microchip Technology 
PIC16F720-EML Datasheet PDF : 254 Pages
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PIC16(L)F720/721
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
Return from Interrupt
[ label ] RETFIE
None
TOS PC,
1 GIE
None
Return from Interrupt. Stack is
POPed and Top-of-Stack (TOS) is
loaded in the PC. Interrupts are
enabled by setting Global
Interrupt Enable bit, GIE
(INTCON<7>). This is a two-cycle
instruction.
1
2
RETFIE
After Interrupt
PC =
GIE =
TOS
1
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
TABLE
Return with literal in W
[ label ] RETLW k
0 k 255
k (W);
TOS PC
None
The W register is loaded with the
eight bit literal ‘k’. The program
counter is loaded from the top of
the stack (the return address).
This is a two-cycle instruction.
1
2
CALL TABLE;W contains
table
;offset value
• ;W now has table value
ADDWF PC ;W = offset
RETLW k1 ;Begin table
RETLW k2 ;
RETLW kn ; End of table
Before Instruction
W = 0x07
After Instruction
W = value of k8
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
Return from Subroutine
[ label ] RETURN
None
TOS PC
None
Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
2010-2013 Microchip Technology Inc.
DS41430D-page 177

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