PIC16C71X
FIGURE 7-2: ADCON0 REGISTER (ADDRESS 1Fh), PIC16C715
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
U-0
ADCS1 ADCS0 — CHS1 CHS0 GO/DONE —
bit7
bit 7-6:
ADCS1:ADCS0: A/D Conversion Clock Select bits
00 = FOSC/2
01 = FOSC/8
10 = FOSC/32
11 = FRC (clock derived from an RC oscillation)
bit 5: Unused
R/W-0
ADON
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit 6-3:
CHS1:CHS0: Analog Channel Select bits
000 = channel 0, (RA0/AN0)
001 = channel 1, (RA1/AN1)
010 = channel 2, (RA2/AN2)
011 = channel 3, (RA3/AN3)
100 = channel 0, (RA0/AN0)
101 = channel 1, (RA1/AN1)
110 = channel 2, (RA2/AN2)
111 = channel 3, (RA3/AN3)
bit 2:
GO/DONE: A/D Conversion Status bit
If ADON = 1
1 = A/D conversion in progress (setting this bit starts the A/D conversion)
0 = A/D conversion not in progress (This bit is automatically cleared by hardware when the A/D conver-
sion is complete)
bit 1:
bit 0:
Unimplemented: Read as '0'
ADON: A/D On bit
1 = A/D converter module is operating
0 = A/D converter module is shutoff and consumes no operating current
FIGURE 7-3: ADCON1 REGISTER, PIC16C710/71/711 (ADDRESS 88h),
PIC16C715 (ADDRESS 9Fh)
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
bit7
bit 7-2: Unimplemented: Read as '0'
bit 1-0: PCFG1:PCFG0: A/D Port Configuration Control bits
R/W-0
PCFG1
R/W-0
PCFG0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented
bit, read as ‘0’
- n =Value at POR reset
PCFG1:PCFG0 RA1 & RA0
RA2
00
A
A
01
A
A
10
A
D
11
D
D
A = Analog input
D = Digital I/O
RA3
A
VREF
D
D
VREF
VDD
RA3
VDD
VDD
DS30272A-page 38
© 1997 Microchip Technology Inc.