PIC18LF1320-I/PSQTP データシートの表示（PDF） - Microchip Technology

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PIC18LF1320-I/PSQTP

18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F1220/1320

FIGURE 15-3:

SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODULE

Duty Cycle Registers

CCPR1L

CCP1CON<5:4>

CCPR1H (Slave)

Comparator

R

TMR2

(Note 1)

S

Comparator

PR2

Clear Timer,

set CCP1 pin and

latch D.C.

P1M1<1:0>

2

CCP1M<3:0>

4

CCP1/P1A

TRISB<3>

P1B

Q

Output

Controller

TRISB<2>

P1C

TRISB<6>

P1D

TRISB<7>

CCP1DEL

RB3/CCP1/P1A

RB2/P1B/INT2

RB6/PGC/T1OSO/T13CKI/

P1C/KBI2

RB7/PGD/T1OSI/P1D/KBI3

Note:

The 8-bit TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the

10-bit time base.

FIGURE 15-4:

PWM OUTPUT RELATIONSHIPS (ACTIVE-HIGH STATE)

CCP1CON<7:6>

SIGNAL

0

Duty

Cycle

Period

00 (Single Output)

10 (Half-Bridge)

(Full-Bridge,

01 Forward)

(Full-Bridge,

11

Reverse)

P1A Modulated

P1A Modulated

P1B Modulated

P1A Active

P1B Inactive

P1C Inactive

P1D Modulated

P1A Inactive

P1B Modulated

P1C Active

P1D Inactive

Delay(1)

Delay(1)

PR2+1

DS39605F-page 120

© 2007 Microchip Technology Inc.

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