PIC18LF4682-I/ML データシートの表示（PDF） - Microchip Technology
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PIC18LF4682-I/ML
Microchip Technology
PIC18LF4682-I/ML Datasheet PDF : 484 Pages
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PIC18F2682/2685/4682/4685
REGISTER 23-28: BnEIDH: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
HIGH BYTE IN RECEIVE MODE [0 ≤ n ≤ 5, TXnEN (BSEL0<n>) = 0](1)
R-x
EID15
bit 7
R-x
EID14
R-x
EID13
R-x
EID12
R-x
EID11
R-x
EID10
R-x
EID9
R-x
EID8
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EID15:EID8: Extended Identifier bits
Note 1: These registers are available in Mode 1 and 2 only.
REGISTER 23-29: BnEIDH: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
HIGH BYTE IN TRANSMIT MODE [0 ≤ n ≤ 5, TXnEN (BSEL0<n>) = 1](1)
R/W-x
EID15
bit 7
R/W-x
EID14
R/W-x
EID13
R/W-x
EID12
R/W-x
EID11
R/W-x
EID10
R/W-x
EID9
R/W-x
EID8
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EID15:EID8: Extended Identifier bits
Note 1: These registers are available in Mode 1 and 2 only.
REGISTER 23-30: BnEIDL: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
LOW BYTE IN RECEIVE MODE [0 ≤ n ≤ 5, TXnEN (BSEL<n>) = 0](1)
R-x
EID7
bit 7
R-x
EID6
R-x
EID5
R-x
EID4
R-x
EID3
R-x
EID2
R-x
EID1
R-x
EID0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EID7:EID0: Extended Identifier bits
Note 1: These registers are available in Mode 1 and 2 only.
© 2007 Microchip Technology Inc.
Preliminary
DS39761B-page 299
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