PIC18F45J50-I/SOSQTP データシートの表示（PDF） - Microchip Technology

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PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

23.7 Comparator Operation During

Sleep

When a comparator is active and the device is placed

in Sleep mode, the comparator remains active and the

interrupt is functional if enabled. This interrupt will

wake-up the device from Sleep mode when enabled.

Each operational comparator will consume additional

current. To minimize power consumption while in Sleep

mode, turn off the comparators (CON = 0) before

entering Sleep. If the device wakes up from Sleep, the

contents of the CMxCON register are not affected.

23.8 Effects of a Reset

A device Reset forces the CMxCON registers to their

Reset state. This forces both comparators and the

voltage reference to the OFF state.

TABLE 23-3: REGISTERS ASSOCIATED WITH COMPARATOR MODULE

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

Values

on Page:

INTCON

GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF

69

PIR2

OSCFIF CM2IF

CM1IF USBIF BCL1IF HLVDIF TMR3IF CCP2IF

71

PIE2

OSCFIE CM2IE CM1IE USBIE BCL1IE HLVDIE TMR3IE CCP2IE

71

IPR2

OSCFIP CM2IP CM1IP USBIP BCL1IP HLVDIP TMR3IP CCP2IP

71

CMxCON

CON

COE

CPOL EVPOL1 EVPOL0 CREF CCH1 CCH0

70

CVRCON

CVREN CVROE CVRR

r

CVR3 CVR2 CVR1 CVR0

74

CMSTAT

—

—

—

—

—

—

COUT2 COUT1

73

ANCON0 PCFG7(1) PCFG6(1) PCFG5(1) PCFG4 PCFG3 PCFG2 PCFG1 PCFG0

74

TRISA

TRISA7 TRISA6 TRISA5

—

TRISA3 TRISA2 TRISA1 TRISA0

72

Legend: — = unimplemented, read as ‘0’, r = reserved. Shaded cells are not related to comparator operation.

Note 1: These bits and/or registers are not implemented on 28-pin devices.

DS39931D-page 390

 2011 Microchip Technology Inc.

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