PIC18F45J50-I/SOSQTP データシートの表示（PDF） - Microchip Technology
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PIC18F45J50-I/SOSQTP
Microchip Technology
PIC18F45J50-I/SOSQTP Datasheet PDF : 562 Pages
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PIC18F46J50 FAMILY
25.6 Operation During Sleep
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
25.7 Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
TABLE 25-1: REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page
HLVDCON VDIRMAG BGVST IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0
72
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
69
PIR2
OSCFIF CM2IF CM1IF USBIF BCL1IF HLVDIF TMR3IF CCP2IF
71
PIE2
OSCFIE CM2IE CM1IE USBIE BCL1IE HLVDIE TMR3IE CCP2IE
71
IPR2
OSCFIP CM2IP CM1IP USBIP BCL1IP HLVDIP TMR3IP CCP2IP
71
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
DS39931D-page 400
2011 Microchip Technology Inc.
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