ST72334N2B7(2003) データシートの表示（PDF） - STMicroelectronics

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ST72334N2B7
(Rev.:2003)

8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES

STMicroelectronics 

ST72334J/N, ST72314J/N, ST72124J

DATA EEPROM (Cont’d)

6.4 POWER SAVING MODES

Wait mode

The DATA EEPROM can enter WAIT mode on ex-

ecution of the WFI instruction of the microcontrol-

ler. The DATA EEPROM will immediately enter

this mode if there is no programming in progress,

otherwise the DATA EEPROM will finish the cycle

and then enter WAIT mode.

Halt mode

The DATA EEPROM immediatly enters HALT

mode if the microcontroller executes the HALT in-

struction. Therefore the EEPROM will stop the

function in progress, and data may be corrupted.

6.5 ACCESS ERROR HANDLING

If a read access occurs while LAT=1, then the data

bus will not be driven.

If a write access occurs while LAT=0, then the

data on the bus will not be latched.

If a programming cycle is interrupted (by software/

RESET action), the memory data will not be guar-

anteed.

Figure 9. Data EEPROM Programming Cycle

INTERNAL

PROGRAMMING

VOLTAGE

WRITE OF

DATA LATCHES

READ OPERATION NOT POSSIBLE

ERASE CYCLE

WRITE CYCLE

tPROG

READ OPERATION POSSIBLE

LAT

PGM

EEPROM INTERRUPT

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