ST7MC2N6 データシートの表示（PDF） - STMicroelectronics

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ST7MC2N6

8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI™

STMicroelectronics 

ST7MC1xx/ST7MC2xx

MOTOR CONTROLLER (Cont’d)

10.6.8.5 Current feedback amplifier

In both current and voltage mode, the current

feedback from the motor can be amplified before

entering the comparator. This is done by an inte-

grated Op-amp that can be used when the OAON

bit is set in the OACSR register and the CFAV bit

in the MREF register is reset. This allows the three

points of the Op-amp to be accessed for a pro-

grammable gain. The CFAV bit in the MREF regis-

ter selects the MCCFI0 or OAZ(MCCFI1) pin as

the comparator input as shown in the following ta-

ble.

Table 46. Comparator input selection

CFAV bit

Meaning

0

Select OAZ(MCCFI1) as the current

comparator input

1

Select MCCFI0 as the current compara-

tor input

If the amplifier is not used for current feedback, it

can be used for other purposes. In this case, the

OAON bit in the OACSR register and the CFAV bit

in the MREF register both have to be set. This

means that the current feedback has to be on the

MCCFI0 pin to be directly connected to the com-

parator and the OAP, OAN and OAZ (MCCFI1)

pins can be used to amplify another signal. Both

the OAZ(MCCFI1) and MCCFI0 pins can be con-

nected to an ADC entry. See (Figure 106).

Note: The MCCFI0 pin is not available in LQFP32;

SDIP32 and LQFP44 devices. In this case, the

CFAV bit must be reset. The choice to use the Op-

amp or not is made with the OAON bit.

10.6.8.6 Measurement Window

In current mode, the measurement window fre-

quency can be programmed between 390Hz and

50KHz by the means of the SA[3:0] bits in the

MPRSR register.

Note: These frequencies are given for a 4 MHz

peripheral input frequency for a BLDC drive

(XT16, XT8 bits in MCONF register).

In sensorless mode this measurement window can

be used to detect BEMF zero crossing events. Its

width can be defined between 2.5μs and 40μs as a

minimum in sensorless mode by the OT[3:0] bits in

the MPWME register.

Figure 106. Current Feedback

MREF Register

PWME[U:V:W] bit

MCPWMU/V/W

VDD

R1ext

(I)

(V)

R2ext

OACSR

Register

OAP

OAN

OAON bit

+

-

OAZ

(MCCFI1)

MCCFI0

MCCREF ADC

MREF

Register

CFAV bit

+

-

VCREF

CEXT

VCREF MAX = VDD

Power down mode

12-Bit PWM generator

LEGEND:

(I): Current mode

(V): Voltage mode

CLI: Current limitation inter-

rupt

Filter

MCFR register

CFF[2:0] bits

CLI

CFW[2:0] bits

MCFR register

To Phase State

R

D

Q

Control

Internal clock

Sampling frequency

I

12-bit PWM generator/Compare U

V

MCRA Register

V0C1 bit

CP Q

S

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