STM32F050F4P7 データシートの表示（PDF） - STMicroelectronics
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STM32F050F4P7
STMicroelectronics
STM32F050F4P7 Datasheet PDF : 97 Pages
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Electrical characteristics
STM32F050xx
6.3.2
Operating conditions at power-up / power-down
The parameters given in Table 16 are derived from tests performed under the ambient
temperature condition summarized in Table 15.
Table 16. Operating conditions at power-up / power-down
Symbol
Parameter
Conditions
Min
Max
Unit
tVDD
tVDDA
VDD rise time rate
VDD fall time rate
VDDA rise time rate
VDDA fall time rate
0
∞
20
∞
µs/V
0
∞
20
∞
6.3.3
Embedded reset and power control block characteristics
The parameter given in Table 17 is derived from tests performed under ambient temperature
and VDD supply voltage conditions summarized in Table 15: General operating conditions.
Table 17. Embedded reset and power control block characteristics
Symbol
Parameter
Conditions
Min Typ Max Unit
VPOR/PDR(1)
Power on/power down
reset threshold
Falling edge
Rising edge
1.8(2) 1.88 1.96 V
1.84 1.92 2.0 V
VPDRhyst(1) PDR hysteresis
tRSTTEMPO(3) Reset temporization
-
40 - mV
1.5 2.5 4.5 ms
1. The PDR detector monitors VDD and also VDDA (if kept enabled in the option bytes). The POR detector
monitors only VDD.
2. The product behavior is guaranteed by design down to the minimum VPOR/PDR value.
3. Guaranteed by design, not tested in production.
Table 18. Programmable voltage detector characteristics
Symbol
Parameter
Conditions Min(1) Typ Max(1) Unit
VPVD0
PVD threshold 0
Rising edge
Falling edge
2.1 2.18 2.26 V
2 2.08 2.16 V
VPVD1
PVD threshold 1
Rising edge 2.19 2.28 2.37 V
Falling edge 2.09 2.18 2.27 V
VPVD2
PVD threshold 2
Rising edge 2.28 2.38 2.48 V
Falling edge 2.18 2.28 2.38 V
VPVD3
PVD threshold 3
Rising edge 2.38 2.48 2.58 V
Falling edge 2.28 2.38 2.48 V
VPVD4
PVD threshold 4
Rising edge 2.47 2.58 2.69 V
Falling edge 2.37 2.48 2.59 V
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Doc ID 023683 Rev 1
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