STM32F030CC(2015) データシートの表示（PDF） - STMicroelectronics

部品番号

コンポーネント説明

メーカー

STM32F030CC
(Rev.:2015)

Value-line ARM®-based 32-bit MCU with up to 256-KB Flash, timers, ADC, communication interfaces, 2.4-3.6 V operation

STMicroelectronics 

STM32F030x4/6/8/C

Electrical characteristics

6.3.13

I/O current injection characteristics

As a general rule, current injection to the I/O pins, due to external voltage below VSS or

above VDDIOx (for standard, 3.3 V-capable I/O pins) should be avoided during normal

product operation. However, in order to give an indication of the robustness of the

microcontroller in cases when abnormal injection accidentally happens, susceptibility tests

are performed on a sample basis during device characterization.

Functional susceptibility to I/O current injection

While a simple application is executed on the device, the device is stressed by injecting

current into the I/O pins programmed in floating input mode. While current is injected into

the I/O pin, one at a time, the device is checked for functional failures.

The failure is indicated by an out of range parameter: ADC error above a certain limit (higher

than 5 LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out

of the -5 μA/+0 μA range) or other functional failure (for example reset occurrence or

oscillator frequency deviation).

The characterization results are given in Table 45.

Negative induced leakage current is caused by negative injection and positive induced

leakage current is caused by positive injection.

Table 45. I/O current injection susceptibility

Symbol

Description

Functional

susceptibility

Unit

Negative Positive

injection injection

Injected current on BOOT0 and PF1 pins

-0

Injected current on PA9, PB3, PB13, PF11 pins with induced

leakage current on adjacent pins less than 50 μA

-5

Injected current on PA11 and PA12 pins with induced

IINJ leakage current on adjacent pins less than -1 mA

-5

Injected current on all other FT and FTf pins

-5

Injected current on PB0 and PB1 pins

-5

Injected current on PC0 pin

-0

Injected current on all other TTa, TC and RST pins

-5

NA

NA

NA

mA

NA

NA

+5

+5

6.3.14

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 46 are derived from tests

performed under the conditions summarized in Table 21: General operating conditions. All

I/Os are designed as CMOS- and TTL-compliant (except BOOT0).

DocID024849 Rev 2

65/96

80

Share Link: