PSD8532-12MI データシートの表示（PDF） - STMicroelectronics
部品番号
コンポーネント説明
メーカー
PSD8532-12MI Datasheet PDF : 110 Pages
| |||
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
Table 56. READ Timing (3V devices)
Symbol
Parameter
Conditions
-12
Min Max
-15
Min Max
-20
Turbo
Min Max Off
Unit
tLVLX
ALE or AS Pulse Width
26
26
30
ns
tAVLX
Address Setup Time
(Note 3)
9
10
12
ns
tLXAX
Address Hold Time
(Note 3)
9
12
14
ns
tAVQV
Address Valid to Data Valid
(Note 3)
120
150
200 + 20 ns
tSLQV
CS Valid to Data Valid
120
150
200
ns
RD to Data Valid 8-Bit Bus
(Note 5)
35
35
40
ns
tRLQV
RD or PSEN to Data Valid 8-Bit Bus,
8031, 80251
(Note 2)
45
50
55
ns
tRHQX RD Data Hold Time
(Note 1)
0
0
0
ns
tRLRH
RD Pulse Width
38
40
45
ns
tRHQZ RD to Data High-Z
(Note 1)
38
40
45
ns
tEHEL
E Pulse Width
40
45
52
ns
tTHEH R/W Setup Time to Enable
15
18
20
ns
tELTL
R/W Hold Time After Enable
0
0
0
ns
tAVPV
Address Input Valid to
Address Output Delay
(Note 4)
33
35
40
ns
Note: 1. RD timing has the same timing as DS, LDS, UDS, and PSEN signals.
2. RD and PSEN have the same timing for 8031.
3. Any input used to select an internal PSD function.
4. In multiplexed mode latched address generated from ADIO delay to address output on any Port.
5. RD timing has the same timing as DS, LDS, and UDS signals.
89/110
Share Link: 