WM8772SEDS/RV データシートの表示（PDF） - Cirrus Logic
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WM8772SEDS/RV Datasheet PDF : 73 Pages
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WM8772EDS – 28 LEAD SSOP
Production Data
The MUTE pin is an input to select mute or not mute. MUTE is active high; taking the pin high causes
the filters to soft mute, ramping down the audio signal over a few milliseconds. Taking MUTE low
again allows data into the filter.
The automute function detects a series of ZERO value audio samples of 1024 samples long being
applied to both channels. After such an event, a latch is set whose output (AUTOMUTED) is wire
OR’ed through a 10kΩ resistor to the MUTE pin. Thus if the MUTE pin is not being driven, the
automute function will assert mute.
If MUTE is tied low, AUTOMUTED is overridden and will not mute unless the IZD register bit is set. If
MUTE is driven from a bi-directional source, then both MUTE and automute functions are available. If
MUTE is not driven, AUTOMUTED appears as a weak output (10kΩ source impedance) and can be
used to drive external mute circuits. AUTOMUTED will be removed as soon as any channel receives
a non-ZERO input.
A diagram showing how the various Mute modes interact is shown below Figure 20.
IZD (Register Bit)
AUTOMUTED
(Internal Signal)
MUTE
PIN
MUTE (Register Bit)
10kΩ
SOFTMUTE
(Internal
Signal)
Figure 20 Selection Logic for MUTE Modes
INPUT FORMAT SELECTION
In hardware mode, ML/I2S and MC/IWL become input controls for selection of input data format type
and input data word length for both the ADC and DAC.
ML/I2S
0
0
1
1
Table 8 Input Format Selection
MC/IWL
0
1
0
1
INPUT DATA MODE
24-bit right justified
20-bit right justified
16-bit I2S
24-bit I2S
Note:
In 24 bit I2S mode, any width of 24 bits or less is supported provided that the left/right clocks (LRC)
are high for a minimum of 24 bit clocks (BCLK) and low for a minimum of 24 bit clocks.
DE-EMPHASIS CONTROL
In hardware mode, the MD/DM pin becomes an input control for selection of de-emphasis filtering to
be applied.
MD/DM
0
1
Table 9 De-emphasis Control
DE-EMPHASIS
Off
On
w
PD Rev 4.2 October 2005
22
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