Lattice Semiconductor
Pinout Information
LatticeSC/M Family Data Sheet
LFSC/M15, LFSC/M25 Logic Signal Connections: 900 fpBGA1, 2
Ball
Number Ball Function
F7 A_VDDAX25_L
B1 A_REFCLKP_L
C1 A_REFCLKN_L
D5
VCC12
A2
RESP_ULC
E5
VCC12
D4
VCC12
H5
RESETN
H6
TSALLN
G6
DONE
G5
INITN
F5
M0
F6
M1
F4
M2
E4
M3
D3
PL15A
D2
PL15B
J6
PL15C
J5
PL15D
E3
PL17A
E2
PL17B
K4
PL17C
J4
PL17D
F3
PL18A
G3
PL18B
K5
PL18C
K6
PL18D
F2
PL19A
F1
PL19B
E1
PL19C
D1
PL19D
K3
PL22A
L3
PL22B
L6
PL22C
M6
PL22D
J1
PL23A
K1
PL23B
L1
PL24A
M1
PL24B
P8
PL24C
R8
PL24D
N2
PL26A
N1
PL26B
R7
PL26C
R6
PL26D
LFSC/M15
VCCIO
Bank
Dual Function
-
-
-
-
-
-
-
1
1
1
1
1
1
1
1
7
ULC_PLLT_IN_A/ULC_PLLT_FB_B
7 ULC_PLLC_IN_A/ULC_PLLC_FB_B
7
7
7 ULC_DLLT_IN_C/ULC_DLLT_FB_D
7 ULC_DLLC_IN_C/ULC_DLLC_FB_D
7
ULC_PLLT_IN_B/ULC_PLLT_FB_A
7 ULC_PLLC_IN_B/ULC_PLLC_FB_A
7 ULC_DLLT_IN_D/ULC_DLLT_FB_C
7 ULC_DLLC_IN_D/ULC_DLLC_FB_C
7
7
VREF2_7
7
7
7
7
7
7
7
VREF1_7
7
DIFFR_7
7
PCLKT7_1
7
PCLKC7_1
7
PCLKT7_0
7
PCLKC7_0
7
PCLKT7_2
7
PCLKC7_2
6
PCLKT6_0
6
PCLKC6_0
6
PCLKT6_1
6
PCLKC6_1
Ball Function
A_VDDAX25_L
A_REFCLKP_L
A_REFCLKN_L
VCC12
RESP_ULC
VCC12
VCC12
RESETN
TSALLN
DONE
INITN
M0
M1
M2
M3
PL16A
PL16B
PL16C
PL16D
PL17A
PL17B
PL17C
PL17D
PL18A
PL18B
PL18C
PL18D
PL22A
PL22B
PL22C
PL22D
PL25A
PL25B
PL25C
PL25D
PL26A
PL26B
PL27A
PL27B
PL27C
PL27D
PL29A
PL29B
PL29C
PL29D
LFSC/M25
VCCIO
Bank
Dual Function
-
-
-
-
-
-
-
1
1
1
1
1
1
1
1
7 ULC_PLLT_IN_A/ULC_PLLT_FB_B
7 ULC_PLLC_IN_A/ULC_PLLC_FB_B
7
7
7 ULC_DLLT_IN_C/ULC_DLLT_FB_D
7 ULC_DLLC_IN_C/ULC_DLLC_FB_D
7 ULC_PLLT_IN_B/ULC_PLLT_FB_A
7 ULC_PLLC_IN_B/ULC_PLLC_FB_A
7 ULC_DLLT_IN_D/ULC_DLLT_FB_C
7 ULC_DLLC_IN_D/ULC_DLLC_FB_C
7
7
VREF2_7
7
7
7
7
7
7
7
VREF1_7
7
DIFFR_7
7
PCLKT7_1
7
PCLKC7_1
7
PCLKT7_0
7
PCLKC7_0
7
PCLKT7_2
7
PCLKC7_2
6
PCLKT6_0
6
PCLKC6_0
6
PCLKT6_1
6
PCLKC6_1
4-15