STM32F051K4T7 データシートの表示（PDF） - STMicroelectronics

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STM32F051K4T7

ARM®-based 32-bit MCU, 16 to 64 KB Flash, 11 timers, ADC, DAC and communication interfaces, 2.0-3.6 V

STMicroelectronics 

STM32F051x4 STM32F051x6 STM32F051x8

Functional overview

Table 9. STM32F051xx I2C implementation (continued)

I2C features(1)

I2C1

SMBus

X

Wakeup from STOP

X

1. X = supported.

I2C2

-

-

3.17

Universal synchronous/asynchronous receiver/transmitter

(USART)

The device embeds up to two universal synchronous/asynchronous receivers/transmitters

(USART1, USART2) which communicate at speeds of up to 6 Mbit/s.

They provide hardware management of the CTS, RTS and RS485 DE signals,

multiprocessor communication mode, master synchronous communication and single-wire

half-duplex communication mode. USART1 supports also SmartCard communication (ISO

7816), IrDA SIR ENDEC, LIN Master/Slave capability and auto baud rate feature, and has a

clock domain independent of the CPU clock, allowing to wake up the MCU from Stop mode.

The USART interfaces can be served by the DMA controller.

Table 10. STM32F051xx USART implementation

USART modes/features(1)

USART1

Hardware flow control for modem

X

Continuous communication using DMA

X

Multiprocessor communication

X

Synchronous mode

X

Smartcard mode

X

Single-wire half-duplex communication

X

IrDA SIR ENDEC block

X

LIN mode

X

Dual clock domain and wakeup from Stop mode

X

Receiver timeout interrupt

X

Modbus communication

X

Auto baud rate detection

X

Driver Enable

X

1. X = supported.

USART2

X

X

X

X

-

X

-

-

-

-

-

-

X

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