DSPIC33FJ64GP706AI/PF データシートの表示（PDF） - Microchip Technology

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DSPIC33FJ64GP706AI/PF

High-Performance, 16-Bit Digital Signal Controllers

Microchip Technology 

dsPIC33FJXXXGPX06A/X08A/X10A

REGISTER 19-18: CiFMSKSEL1: ECAN™ FILTER 7-0 MASK SELECTION REGISTER

R/W-0

R/W-0

F7MSK<1:0>

bit 15

R/W-0

R/W-0

F6MSK<1:0>

R/W-0

R/W-0

F5MSK<1:0>

R/W-0

R/W-0

F4MSK<1:0>

bit 8

R/W-0

R/W-0

F3MSK<1:0>

bit 7

R/W-0

R/W-0

F2MSK<1:0>

R/W-0

R/W-0

F1MSK<1:0>

R/W-0

R/W-0

F0MSK<1:0>

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-14

bit 13-12

bit 11-10

bit 9-8

bit 7-6

bit 5-4

bit 3-2

bit 1-0

F7MSK<1:0>: Mask Source for Filter 7 bit

11 = Reserved; do not use

10 = Acceptance Mask 2 registers contain mask

01 = Acceptance Mask 1 registers contain mask

00 = Acceptance Mask 0 registers contain mask

F6MSK<1:0>: Mask Source for Filter 6 bit

11 = Reserved; do not use

10 = Acceptance Mask 2 registers contain mask

01 = Acceptance Mask 1 registers contain mask

00 = Acceptance Mask 0 registers contain mask

F5MSK<1:0>: Mask Source for Filter 5 bit

11 = Reserved; do not use

10 = Acceptance Mask 2 registers contain mask

01 = Acceptance Mask 1 registers contain mask

00 = Acceptance Mask 0 registers contain mask

F4MSK<1:0>: Mask Source for Filter 4 bit

11 = Reserved; do not use

10 = Acceptance Mask 2 registers contain mask

01 = Acceptance Mask 1 registers contain mask

00 = Acceptance Mask 0 registers contain mask

F3MSK<1:0>: Mask Source for Filter 3 bit

11 = Reserved; do not use

10 = Acceptance Mask 2 registers contain mask

01 = Acceptance Mask 1 registers contain mask

00 = Acceptance Mask 0 registers contain mask

F2MSK<1:0>: Mask Source for Filter 2 bit

11 = Reserved; do not use

10 = Acceptance Mask 2 registers contain mask

01 = Acceptance Mask 1 registers contain mask

00 = Acceptance Mask 0 registers contain mask

F1MSK<1:0>: Mask Source for Filter 1 bit

11 = Reserved; do not use

10 = Acceptance Mask 2 registers contain mask

01 = Acceptance Mask 1 registers contain mask

00 = Acceptance Mask 0 registers contain mask

F0MSK<1:0>: Mask Source for Filter 0 bit

11 = Reserved; do not use

10 = Acceptance Mask 2 registers contain mask

01 = Acceptance Mask 1 registers contain mask

00 = Acceptance Mask 0 registers contain mask

DS70593C-page 222

© 2011 Microchip Technology Inc.

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