DSPIC33FJ64GP706AI/PF データシートの表示（PDF） - Microchip Technology
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DSPIC33FJ64GP706AI/PF Datasheet PDF : 350 Pages
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dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 21-9: AD1PCFGH: ADC1 PORT CONFIGURATION REGISTER HIGH(1,2,3,4)
R/W-0
PCFG31
bit 15
R/W-0
PCFG30
R/W-0
PCFG29
R/W-0
PCFG28
R/W-0
PCFG27
R/W-0
PCFG26
R/W-0
PCFG25
R/W-0
PCFG24
bit 8
R/W-0
PCFG23
bit 7
R/W-0
PCFG22
R/W-0
PCFG21
R/W-0
PCFG20
R/W-0
PCFG19
R/W-0
PCFG18
R/W-0
PCFG17
R/W-0
PCFG16
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
PCFG<31:16>: ADC Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, ADC input multiplexer connected to AVSS
0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage
Note 1: On devices without 32 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
ports without a corresponding input on device.
2: ADC2 only supports analog inputs AN0-AN15; therefore, no ADC2 port Configuration register exists.
3: PCFGx = ANx, where x = 16 through 31.
4: PCFGx bits have no effect if ADC module is disabled by setting ADxMD bit in the PMDx register. In this
case all port pins multiplexed with ANx will be in Digital mode.
REGISTER 21-10: ADxPCFGL: ADCx PORT CONFIGURATION REGISTER LOW(1,2,3,4)
R/W-0
PCFG15
bit 15
R/W-0
PCFG14
R/W-0
PCFG13
R/W-0
PCFG12
R/W-0
PCFG11
R/W-0
PCFG10
R/W-0
PCFG9
R/W-0
PCFG8
bit 8
R/W-0
PCFG7
bit 7
R/W-0
PCFG6
R/W-0
PCFG5
R/W-0
PCFG4
R/W-0
PCFG3
R/W-0
PCFG2
R/W-0
PCFG1
R/W-0
PCFG0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
PCFG<15:0>: ADC Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, ADC input multiplexer connected to AVSS
0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage
Note 1:
2:
3:
4:
On devices without 16 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
ports without a corresponding input on device.
On devices with two analog-to-digital modules, both AD1PCFGL and AD2PCFGL will affect the
configuration of port pins multiplexed with AN0-AN15.
PCFGx = ANx, where x = 0 through 15.
PCFGx bits have no effect if ADC module is disabled by setting ADxMD bit in the PMDx register. In this
case all port pins multiplexed with ANx will be in Digital mode
DS70593C-page 250
© 2011 Microchip Technology Inc.
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