STM32F373VBT7(2013) データシートの表示（PDF） - STMicroelectronics

部品番号

コンポーネント説明

メーカー

STM32F373VBT7
(Rev.:2013)

ARM Cortex-M4 32b MCU+FPU, up to 256KB Flash+32KB SRAM timers, 4 ADCs (12/16-bit), 3 DACs, 2 comp., 2.0-3.6 V operation

STMicroelectronics 

Functional overview

STM32F37xxx

Table 8. STM32F373x USART implementation (continued)

USART modes/features(1)

USART1 USART2

USART3

Dual clock domain and wakeup from Stop mode

Receiver timeout interrupt

Modbus communication

Auto baud rate detection

X

X

X

X

X

X

X

X

X

X

X

X

Driver Enable

X

X

X

1. X = supported.

3.21

Serial peripheral interface (SPI)/Inter-integrated sound

interfaces (I2S)

Up to three SPIs are able to communicate at up to 18 Mbits/s in slave and master modes in

full-duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode

frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC

generation/verification supports basic SD Card/MMC modes.

The SPIs can be served by the DMA controller.

Three standard I2S interfaces (multiplexed with SPI1, SPI2 and SPI3) are available, that can

be operated in master or slave mode. These interfaces can be configured to operate with

16/32 bit resolution, as input or output channels. Audio sampling frequencies from 8 kHz up

to 192 kHz are supported. When either or both of the I2S interfaces is/are configured in

master mode, the master clock can be output to the external DAC/CODEC at 256 times the

sampling frequency. All I2S interfaces can operate in half-duplex mode only.

Refer to Table 9 for the features between SPI1, SPI2 and SPI3.

Table 9. STM32F373x SPI/I2S implementation

SPI features(1)

SPI1

SPI2

Hardware CRC calculation

Rx/Tx FIFO

NSS pulse mode

I2S mode

X

X

X

X

X

X

X

X

TI mode

I2S full-duplex mode

X

X

1. X = supported.

SPI3

X

X

X

X

X

26/131

DocID022691 Rev 4

Share Link: