DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

STM32F373VC(2013) データシートの表示(PDF) - STMicroelectronics

部品番号
コンポーネント説明
メーカー
STM32F373VC Datasheet PDF : 131 Pages
First Prev 91 92 93 94 95 96 97 98 99 100 Next Last
STM32F37xxx
Electrical characteristics
6.3.16
Communications interfaces
I2C interface characteristics
The I2C interface meets the requirements of the standard I2C communication protocol with
the following restrictions: the I/O pins SDA and SCL are mapped to are not “true” open-
drain. When configured as open-drain, the PMOS connected between the I/O pin and VDD is
disabled, but is still present.
The I2C characteristics are described in Table 56. Refer also to Section 6.3.14: I/O port
characteristics for more details on the input/output alternate function characteristics (SDA
and SCL).
Symbol
Table 56. I2C characteristics(1)
Parameter
Standard
Fast mode
Fast mode +
Unit
Min Max Min Max Min Max
fSCL
SCL clock frequency
0
100
0
tLOW Low period of the SCL clock
4.7
-
1.3
tHIGH High Period of the SCL clock
4
-
0.6
tr
Rise time of both SDA and SCL
signals
-
1000
-
400
0
1000 KHz
-
0.5
-
µs
-
0.26
-
µs
300
-
120
ns
tf
Fall time of both SDA and SCL
signals
-
300
-
300
-
120
ns
tHD;DAT
tVD;DAT
tVD;ACK
tSU;DAT
tHD;STA
Data hold time
Data valid time
Data valid acknowledge time
Data setup time
Hold time (repeated) START
condition
0
-
0
-
3.45(2)
-
-
3.45(2)
-
-
0.9(2)
0.9(2)
0
-
µs
-
0.45(2)
µs
-
0.45(2)
µs
250
-
100
-
50
-
ns
4.0
-
0.6
-
0.26
-
µs
tSU;STA
Set-up time for a repeated
START
condition
4.7
-
0.6
-
0.26
-
µs
tSU;STO Set-up time for STOP condition
4.0
-
0.6
-
0.26
-
µs
tBUF
Bus free time between a
STOP and START condition
4.7
-
1.3
-
0.5
-
µs
Cb
Capacitive load for each bus line
-
400
-
400
-
550
pF
1. The I2C characteristics are the requirements from the I2C bus specification rev03. They are guaranteed by
design when the I2Cx_TIMING register is correctly programmed (refer to reference manual). These
characteristics are not tested in production.
2. The maximum tHD;DAT could be 3.45 µs, 0.9 µs and 0.45 µs for standard mode, fast mode and fast mode
plus, but must be less than the maximum of tVD;DAT or tVD;ACK by a transition time.
DocID022691 Rev 4
91/131
114

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]