DSPIC33FJ32GP802-I/SP データシートの表示（PDF） - Microchip Technology

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DSPIC33FJ32GP802-I/SP

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04

FIGURE 13-3:

32-BIT TIMER BLOCK DIAGRAM

Gate

Sync

Falling Edge

Detect

PRx

PRy

1 Set TyIF

Flag

0

TxCK

FCY

Prescaler

(/n)

TCKPS<1:0>

Prescaler

(/n)

Sync

TCKPS<1:0>

10

00

x1

TGATE

TCS

Comparator

Equal

TGATE

lsw

TMRx

msw

Reset ADC SOC trigger

TMRy

TMRyHLD

Data Bus <15:0>

Note 1: ADC trigger is available only on TMR3:TMR2 and TMR5:TMR2 32-bit timers

2: Timer x is a Type B Timer (x = 2 and 4)

3: Timer y is a Type C Timer (y = 3 and 5)

 2009 Microchip Technology Inc.

Preliminary

DS70292D-page 191

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