ST72324BLJ2B5 データシートの表示（PDF） - STMicroelectronics

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ST72324BLJ2B5

3V range 8-bit MCU with 8 to 32K Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI interface

STMicroelectronics 

ST72324Lxx

SERIAL COMMUNICATIONS INTERFACE (Cont’d)

10.5.5 Low Power Modes

10.5.6 Interrupts

Mode

WAIT

HALT

Description

No effect on SCI.

SCI interrupts cause the device to exit from

Wait mode.

SCI registers are frozen.

In Halt mode, the SCI stops transmitting/re-

ceiving until Halt mode is exited.

The SCI interrupt events are connected to the

same interrupt vector.

These events generate an interrupt if the corre-

sponding Enable Control Bit is set and the inter-

rupt mask in the CC register is reset (RIM instruc-

tion).

Interrupt Event

Event

Flag

Enable

Control

Bit

Exit

from

Wait

Exit

from

Halt

Transmit Data Register

Empty

TDRE

TIE

Yes

No

Transmission Com-

plete

TC TCIE Yes No

Received Data Ready

to be Read

RDRF

Yes No

RIE

Overrun Error Detect-

ed

OR

Yes No

Idle Line Detected

IDLE ILIE Yes No

Parity Error

PE PIE Yes No

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