STM32F100ZD データシートの表示（PDF） - STMicroelectronics
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STM32F100ZD Datasheet PDF : 98 Pages
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STM32F100xC, STM32F100xD, STM32F100xE
Electrical characteristics
Table 34. Synchronous multiplexed NOR/PSRAM read timings(1)(2)
Symbol
Parameter
Min
Max
tw(CLK)
FSMC_CLK period
27.7
td(CLKL-NExL)
FSMC_CLK low to FSMC_NEx low (x = 0...2)
1.5
td(CLKL-NExH) FSMC_CLK low to FSMC_NEx high (x = 0...2)
2
td(CLKL-NADVL) FSMC_CLK low to FSMC_NADV low
4
td(CLKL-NADVH) FSMC_CLK low to FSMC_NADV high
5
td(CLKL-AV)
FSMC_CLK low to FSMC_Ax valid (x = 16...25)
0
td(CLKL-AIV)
FSMC_CLK low to FSMC_Ax invalid (x = 16...25) 2
td(CLKH-NOEL) FSMC_CLK high to FSMC_NOE low
1
td(CLKL-NOEH) FSMC_CLK low to FSMC_NOE high
0.5
td(CLKL-ADV)
FSMC_CLK low to FSMC_AD[15:0] valid
12
td(CLKL-ADIV)
FSMC_CLK low to FSMC_AD[15:0] invalid
0
tsu(ADV-CLKH)
FSMC_A/D[15:0] valid data before FSMC_CLK
high
6
th(CLKH-ADV)
FSMC_A/D[15:0] valid data after FSMC_CLK high 0
tsu(NWAITV-CLKH) FSMC_NWAIT valid before FSMC_CLK high
8
th(CLKH-NWAITV) FSMC_NWAIT valid after FSMC_CLK high
2
1. CL = 15 pF.
2. Preliminary values.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Doc ID 15081 Rev 7
61/98
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