ST7LITE1xB
13.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for VDD, fOSC, and TA.
13.5.1 General Timings
Symbol
Parameter 1)
Conditions
tc(INST)
tv(IT)
Instruction cycle time
Interrupt reaction time 3)
tv(IT) = Δtc(INST) + 10
fCPU=8MHz
fCPU=8MHz
Min
2
250
10
1.25
Typ 2)
3
375
Max
12
1500
22
2.75
Unit
tCPU
ns
tCPU
μs
Notes:
1. Guaranteed by Design. Not tested in production.
2. Data based on typical application software.
3. Time measured between interrupt event and interrupt vector fetch. Δtc(INST) is the number of tCPU cycles needed to fin-
ish the current instruction execution.
4. Data based on design simulation and/or technology characteristics, not tested in production.
13.5.2 External Clock Source
Symbol
Parameter
VOSC1H or VCLKIN_H OSC1/CLKIN input pin high level voltage
VOSC1L or VCLKIN_L OSC1/CLKIN input pin low level voltage
tw(OSC1H) or tw(CLKINH)
tw(OSC1L) or tw(CLKINL)
OSC1/CLKIN high or low time 4)
tr(OSC1) or tr(CLKIN)
tf(OSC1) or tf(CLKIN)
OSC1/CLKIN rise or fall time 4)
IL
OSCx/CLKIN Input leakage current
Conditions
see Figure 78
VSS≤VIN≤VDD
Min Typ
0.7xVDD
VSS
Max Unit
VDD
V
0.3xVDD
15
ns
15
±1 μA
Figure 78. Typical Application with an External Clock Source
VOSC1H or VCLKINH
VOSC1L or VCLKINL
90%
10%
tr(OSC1 or CLKIN)) tf(OSC1 or CLKIN)
tw(OSC1H or CLKINH)) tw(OSC1L or CLKINL)
EXTERNAL
CLOCK SOURCE
OSC2
Not connected internally
OSC1/CLKIN
fOSC
IL
ST72XXX
13.5.3 Auto Wakeup from Halt Oscillator (AWU)
Symbol
fAWU
tRCSRT
Parameter 1)
AWU Oscillator Frequency
AWU Oscillator startup time
Conditions
Note: 1. Guaranteed by Design. Not tested in production.
Min
Typ
Max
Unit
50
125
250
kHz
50
µs
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