STM32L152CBH6DTR(2013) データシートの表示（PDF） - STMicroelectronics
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STM32L152CBH6DTR
(Rev.:2013)
(Rev.:2013)
STMicroelectronics
STM32L152CBH6DTR Datasheet PDF : 121 Pages
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STM32L151x6/8/B, STM32L152x6/8/B
Electrical characteristics
6.3.12 I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in Table 42 are derived from tests
performed under conditions summarized in Table 14. All I/Os are CMOS and TTL compliant.
Table 42. I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ Max Unit
VIL Input low level voltage
Standard I/O input high level voltage
VIH FT(2) I/O input high level voltage
TTL ports
2.7 V ≤ VDD≤ 3.6 V
VSS - 0.3
2(1)
0.8
VDD+0.3
5.5V
VIL Input low level voltage
Standard I/O Input high level voltage
VIH
FT(5) I/O input high level voltage
Vhys
Standard I/O Schmitt trigger voltage
hysteresis(6)
CMOS ports
1.65 V ≤ VDD≤ 3.6 V
CMOS ports
1.65 V ≤ VDD≤ 3.6 V
CMOS ports
1.65 V ≤ VDD≤ 2.0 V
CMOS ports
2.0 V≤ VDD≤ 3.6 V
–0.3
0.7
VDD(3)(4)
10% VDD(7)
0.3VDD(3)
VDD+0.3 V
5.25
5.5
VSS ≤ VIN ≤ VDD
I/Os with LCD
±50
VSS ≤ VIN ≤ VDD
I/Os with analog switches
±50
Ilkg Input leakage current (8)(3)
VSS ≤ VIN ≤ VDD
I/Os with analog switches
and LCD
±50 nA
VSS ≤ VIN ≤ VDD
I/Os with USB
TBD
VSS ≤ VIN ≤ VDD
Standard I/Os
±50
RPU Weak pull-up equivalent resistor(9)(3)
RPD Weak pull-down equivalent resistor(9)(3)
VIN = VSS
VIN = VDD
30
45
60
kΩ
30
45
60
kΩ
CIO I/O pin capacitance
5
pF
1. Guaranteed by design.
2. FT = 5V tolerant. To sustain a voltage higher than VDD +0.5 the internal pull-up/pull-down resistors must be disabled.
3. Tested in production
4. 0.7VDD for 5V-tolerant receiver
5. FT = Five-volt tolerant.
6. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production.
7. With a minimum of 200 mV. Based on characterization, not tested in production.
8. The max. value may be exceeded if negative current is injected on adjacent pins.
Doc ID 17659 Rev 8
79/121
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