STM32L152CBH6DTR(2013) データシートの表示（PDF） - STMicroelectronics

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STM32L152CBH6DTR
(Rev.:2013)

Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3, 128KB Flash, 16KB SRAM, 4KB EEPROM, LCD, USB, ADC, DAC

STMicroelectronics 

STM32L151x6/8/B, STM32L152x6/8/B

Electrical characteristics

6.3.14

Figure 19. Recommended NRST pin protection

External

reset circuit(1)

VDD

NRST(2)

RPU

0.1 μF

Internal reset

Filter

STM32L15xxx

ai17854

1. The reset network protects the device against parasitic resets.

2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in

Table 45. Otherwise the reset will not be taken into account by the device.

TIM timer characteristics

The parameters given in the following table are guaranteed by design.

Refer to Section 6.3.11: I/O current injection characteristics for details on the input/output

alternate function characteristics (output compare, input capture, external clock, PWM

output).

Table 46. TIMx(1) characteristics

Symbol

Parameter

Conditions

Min

Max

Unit

tres(TIM)

fEXT

ResTIM

Timer resolution time

fTIMxCLK = 32 MHz

Timer external clock

frequency on CH1 to CH4 fTIMxCLK = 32 MHz

Timer resolution

1

31.25

0

0

fTIMxCLK/2

16

16

tCOUNTER

16-bit counter clock period

when internal clock is

selected (timer’s prescaler

disabled)

fTIMxCLK = 32 MHz

1

0.0312

65536

2048

tMAX_COUNT Maximum possible count

fTIMxCLK = 32 MHz

1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers.

65536 × 65536

134.2

tTIMxCLK

ns

MHz

MHz

bit

tTIMxCLK

µs

tTIMxCLK

s

Doc ID 17659 Rev 8

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