STM32F301R8Y6(2014) データシートの表示（PDF） - STMicroelectronics

部品番号

コンポーネント説明

メーカー

STM32F301R8Y6
(Rev.:2014)

ARM® Cortex®-M4 32-bit MCU+FPU, up to 64 KB Flash, 16 KB SRAM, ADC, DAC, COMP, Op-Amp, 2.0 – 3.6 V

STMicroelectronics 

Electrical characteristics

STM32F301x6 STM32F301x8

Table 70. Operational amplifier characteristics(1) (continued)

Symbol

Parameter

Condition

Min

Typ

Max

PGA gain Non inverting gain value

-

2

-

-

4

-

-

-

8

-

-

16

-

Rnetwork

R2/R1 internal resistance values in

PGA mode (2)

PGA gain error PGA gain error

Ibias

OPAMP input bias current

PGA BW

PGA bandwidth for different non

inverting gain

Gain=2

-

Gain=4

-

Gain=8

-

Gain=16

-

-

-1%

-

-

PGA Gain = 2,

Cload = 50pF,

-

Rload = 4 K

PGA Gain = 4,

Cload = 50pF,

-

Rload = 4 K

PGA Gain = 8,

Cload = 50pF,

-

Rload = 4 K

PGA Gain = 16,

Cload = 50pF,

-

Rload = 4 K

@ 1KHz, Output

loaded with

-

4 K

5.4/5.4

16.2/5.4

37.8/5.4

40.5/2.7

-

-

-

-

-

-

1%

0.2(3)

4

-

2

-

1

-

0.5

-

109

-

Unit

-

k

%

μA

MHz

en

Voltage noise density

@ 10KHz,

--n----V-----

Hz

Output loaded

-

43

-

with 4 K

1. Guaranteed by design, not tested in production.

2. R2 is the internal resistance between OPAMP output and OPAMP inverting input.

R1 is the internal resistance between OPAMP inverting input and ground.

The PGA gain =1+R2/R1

3. Mostly TTa I/O leakage, when used in analog mode.

110/132

DocID025146 Rev 3

Share Link: