STM32F301R8Y6(2014) データシートの表示（PDF） - STMicroelectronics

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STM32F301R8Y6
(Rev.:2014)

ARM® Cortex®-M4 32-bit MCU+FPU, up to 64 KB Flash, 16 KB SRAM, ADC, DAC, COMP, Op-Amp, 2.0 – 3.6 V

STMicroelectronics 

Electrical characteristics

STM32F301x6 STM32F301x8

6.3.17

Communications interfaces

I2C interface characteristics

The I2C interface meets the timings requirements of the I2C-bus specification and user

manual rev. 03 for:

 Standard-mode (Sm): with a bit rate up to 100 kbit/s

 Fast-mode (Fm): with a bit rate up to 400 kbit/s

 Fast-mode Plus (Fm+): with a bit rate up to 1 Mbit/s.

The I2C timings requirements are guaranteed by design when the I2C peripheral is properly

configured (refer to Reference manual).

The SDA and SCL I/O requirements are met with the following restrictions: the SDA and

SCL I/O pins are not "true" open-drain. When configured as open-drain, the PMOS

connected between the I/O pin and VDDIOx is disabled, but is still present. Only FTf I/O pins

support Fm+ low level output current maximum requirement. Refer to Section 6.3.14: I/O

port characteristics for the I2C I/Os characteristics.

All I2C SDA and SCL I/Os embed an analog filter. Refer to the table below for the analog

filter characteristics:

Symbol

Table 60. I2C analog filter characteristics(1)

Parameter

Min

Max

Unit

Maximum pulse width of spikes

tAF

that are suppressed by the analog

50(2)

260(3)

ns

filter

1. Guaranteed by design, not tested in production.

2. Spikes with widths below tAF(min) are filtered.

3. Spikes with widths above tAF(max) are not filtered

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