ST72E633K1M1 データシートの表示（PDF） - STMicroelectronics

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ST72E633K1M1

LOW SPEED USB 8-BIT MCU FAMILY with up to 16K MEMORY, up to 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I2C

STMicroelectronics 

ST7263

I/O PORTS (Cont’d)

5.1.5 Port B

Table 11. Port B Description

PORT B

I/O

Input*

Output

PB0

without pull-up push-pull

PB1

without pull-up push-pull

PB2

without pull-up push-pull

PB3

without pull-up push-pull

PB4

without pull-up push-pull

PB5

without pull-up push-pull

PB6

without pull-up push-pull

PB7

*Reset State

without pull-up push-pull

Alternate Function

Signal

Condition

Analog input (ADC)

CH[2:0] = 000 (ADCCSR)

Analog input (ADC)

CH[2:0] = 001 (ADCCSR)

Analog input (ADC)

CH[2:0]= 010 (ADCCSR)

Analog input (ADC)

CH[2:0]= 011 (ADCCSR)

Analog input (ADC)

CH[2:0]= 100 (ADCCSR)

IT5 Schmitt triggered input IT4E = 1 (ITIFRE)

Analog input (ADC)

CH[2:0]= 101 (ADCCSR)

IT6 Schmitt triggered input IT5E = 1 (ITIFRE)

Analog input (ADC)

CH[2:0]= 110 (ADCCSR)

IT7 Schmitt triggered input IT6E = 1 (ITIFRE)

Analog input (ADC)

CH[2:0]= 111 (ADCCSR)

IT8 Schmitt triggered input IT7E = 1 (ITIFRE)

Figure 20. Port B Configuration

ALTERNATE ENABLE

ALTERNATE 1

OUTPUT

0

DR

LATCH

ALTERNATE ENABLE

DDR

LATCH

ANALOG ENABLE

(ADC)

VDD

VDD

P-BUFFER

PAD

DDR SEL

ANALOG

SWITCH

N-BUFFER

DIODES

DR SEL

1

ALTERNATE ENABLE

DIGITAL ENABLE

0

VSS

ALTERNATE INPUT

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