ST72E632K2B0 データシートの表示（PDF） - STMicroelectronics

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ST72E632K2B0

LOW SPEED USB 8-BIT MCU FAMILY with up to 16K MEMORY, up to 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I2C

STMicroelectronics 

ST7263

SERIAL COMMUNICATIONS INTERFACE (Cont’d)

5.5.5 Low Power Modes

Mode

WAIT

HALT

Description

No effect on SCI.

SCI interrupts exit from Wait mode.

SCI registers are frozen.

In Halt mode, the SCI stops transmitting/receiving until Halt mode is exited.

5.5.6 Interrupts

Interrupt Event

Transmit Data Register Empty

Transmission Complete

Received Data Ready to be Read

Overrrun Error Detected

Idle Line Detected

Event

Flag

TDRE

TC

RDRF

OR

IDLE

Enable

Control

Bit

TIE

TCIE

RIE

ILIE

Exit

from

Wait

Yes

Yes

Yes

Yes

Yes

Exit

from

Halt

No

No

No

No

No

The SCI interrupt events are connected to the

same interrupt vector (see Interrupts chapter).

These events generate an interrupt if the corre-

sponding Enable Control Bit is set and the inter-

rupt mask in the CC register is reset (RIM instruc-

tion).

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